Scott Grauer-Gray

• Email: sgrauerg@gmail.com
• LinkedIn: https://www.linkedin.com/in/scott-grauer-gray-30992a1a
• GitHub: https://github.com/sgrauerg6
• Google Scholar: https://scholar.google.com/citations?user=y35b43QAAAAJ

Bicycle food delivery

Research Interests

• High performance computing and optimization, particularly on graphics processing units (GPUs) using CUDA, OpenCL, and directive-based languages
  


• Applications of high performance computing, specifically as used for financial applications, benchmark suites, and real-time stereo analysis/motion estimation from a pair/sequence of images

Publications and Supplemental Material

• S. Grauer-Gray, W. Killian, R. Searles, J. Cavazos. Accelerating Financial Applications on the GPU. In Sixth Workshop on General Purpose Processing Using GPUs (GPGPU 6) 2013.

• Presentation Slides
• Code (any work using this code should cite above paper)

• Zhan Yu, Christopher Thorpe, Xuan Yu, Scott Grauer-Gray, Feng Li, and Jingyi Yu. Racking Focus and Tracking Focus on Live Video Streams: A Stereo Solution. In The Visual Computer, February 2013.

• YouTube Video 1
• YouTube Video 2
• YouTube Video 3
  

• S. Grauer-Gray, L. Xu, R. Searles, S. Ayalasomayajula, J. Cavazos. Auto-tuning a High-Level Language Targeted to GPU Codes. In Proceedings of Innovative Parallel Computing (InPar) 2012. (See IEEE Disclaimer below)

• Presentation Slides
• Intial PolyBench/GPU Benchmark Suite used for results in paper and updated version that matches format of Polybench 3.2 and adds OpenACC/OpenMP versions of each benchmark (any work using either code should cite above paper)

• Zhan Yu, Christopher Thorpe, Xuan Yu, Scott Grauer-Gray, Feng Li, and Jingyi Yu. Dynamic Depth-of-Field on Live Video Streams: A Stereo Solution. In Computer Graphics International (CGI) 2011.

• Project Website
  

• S. Grauer-Gray, J. Cavazos. Optimizing and Auto-tuning Belief Propagation on the GPU. In The 23rd International Workshop on Languages and Compilers for Parallel Computing (LCPC) 2010.
  
  
  • Presentation Slides



• S. Grauer-Gray, C. Kambhamettu. Hierarchical Belief Propagation To Reduce Search Space Using CUDA for Stereo and Motion Estimation. In IEEE Workshop on Applications of Computer Vision (WACV) 2009. (See IEEE Disclaimer below)
  
  
  • Presentation Poster
  • Project page
    
  • Code (any work using this code should cite above paper)



• S. Grauer-Gray, C. Kambhamettu, K. Palaniappan. GPU Implementation of Belief Propagation Using CUDA for Cloud Tracking and Reconstruction. In 5th IAPR Workshop on Pattern Recognition in Remote Sensing (PRRS) 2008. (See IEEE Disclaimer below)
  
  
  • Presentation Slides
  • Project page
  • Code (any work using this code should cite above paper)
    
  • Original Code
    
  • Updated Code w/ optimized CPU implementation in addition to CUDA
  • Relative speedup across various processors using updated code:
  • NVIDIA H100: 2.41x
  • NVIDIA A100: 1.80x
  • RTX 3090 Ti: 1.65x
  • AMD Milan-X (60 Cores): 1.35x
  • Amazon Graviton3 (64 Cores): 1.21x
  • NVIDIA V100: 1.14x
  • Amphere Altra (80 Cores): 1.00x
  • Intel Ice Lake (32 Cores): 0.975x
  • AMD Rome (48 Cores): 0.97x
  • Amazon Graviton2 (64 Cores): 0.925x
  • NVIDIA P100: 0.785x
  • Intel Cascade Lake (24 Cores): 0.63x
  • Spreadsheet with detailed results
  • Follow-up 'paper': "Optimizing Global Stereo Matching on NVIDIA GPUs and CPUs"
  • Describes additional CUDA code optimizations with evaluation on multiple GPUs including Tesla V100.
  • Introduces parallel CPU implementation using OpenMP, SIMD instructions, and the same optimizations as the CUDA code, with evaluation on multiple CPUs.
  • TLDR #1: Was able to get a speedup of over 2x on many tests with no loss of accuracy by (1) getting rid of many cudaMalloc()/cudaFree() calls, (2) using 16-bit half precision data rather than 32-bit floats, and (3) improving data alignment.
  • TLDR #2: Parallel/optimized CPU implementation much faster than initial non-parallel code, but optimized CUDA implementation on Tesla V100 is still 1.9x-4.2x faster than optimized CPU implementation on 24-core Xeon CPU.